Number of Position(s): 2 Duration: 4+ months Dates: January 2027 - May 2027 Location: Onsite in San Jose, CA Educational Requirements Currently a candidate for a master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US. • Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs • Create the layout floor plans to optimize the overall performance • Exploring the trade-offs of the different circuit topologies • Familiarity with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. …
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